This invention relates to the field of digital data transfer synchronization, and more particularly to the field of the acquisition of valid data from a target system by a logic analyzer or digital oscilloscope.
Many modern digital instruments, such as digital oscilloscopes and logic analyzers, use an internal periodic clock signal to sample and process data. In order to sample and process data whose validity is related to the occurrence of an external clock, such instruments must either use the external clock as the source of their internal clock or they must re-synchronize the external data to their internal clock. Using the external clock as the internal clock becomes problematical in high speed or complex systems. For example, if it is desired to keep track of the time of arrival of incoming data by associating a local time with it, called "timestamping" the data, doing so exactly becomes very difficult when an external clock signal is used as the internal clock.
Re-synchronizing the incoming data to an internal clock permits less expensive and more reliable designs, but this approach previously required that the external clock frequency be half or less than half of the internal clock frequency What is desired is a way of reliably capturing data from an external synchronous system that is running almost as fast as the acquiring system and effectively re-synchronizing that incoming data to an internal clock.